发明名称 Defect detection and repair in an embedded random access memory
摘要 An integrated circuit comprises a volatile memory array, a non-volatile memory array, a plurality of registers, and a plurality of flip-flops. A portion of the non-volatile memory array is used for storing an address of a defective memory cell of the volatile memory array. The plurality of registers is coupled to the non-volatile memory array. The plurality of registers temporarily stores the address of the defective memory cell during a normal operating mode of the integrated circuit. Each of the plurality of flip-flops are used for substituting for a defective memory cell of the volatile memory array and are implemented on the integrated circuit physically separate from the volatile memory array.
申请公布号 US2007136640(A1) 申请公布日期 2007.06.14
申请号 US20050300078 申请日期 2005.12.14
申请人 JARRAR ANIS M 发明人 JARRAR ANIS M.
分类号 G11C29/00 主分类号 G11C29/00
代理机构 代理人
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