MEMORY ADDRESS COUNTER AND MEMORY CONTROL UNIT FOR RADIX-2-SQUARE SDF FFT

摘要

A method for generating a memory address in an FFT system and a twiddle factor generator using the same are provided to minimize an area of an IC chip and reduce power consumption in an R2^2SDF(Radix-2-square Single-path Delay Feedback) type FFT processor by reducing a memory size for storing twiddle factors. A memory address calculator(200) generates a temporary address value for the second twiddle factor based on the previously generated first twiddle factor, generates a memory address based on the temporary memory address, and outputs a control signal based on the temporary memory address for the second twiddle factor. A twiddle factor storing part(100) stores the second twiddle factor value by corresponding to the memory address of the twiddle factor output from the memory address calculator, and outputs an actual and imaginary number part of the second twiddle factor value to a controller(300). The controller outputs the second twiddle factor value output from the twiddle factor storing part to the system based on a control signal output from the memory address calculator.