| 摘要 |
The display device allows the serial values provided at the output of a demodulator for the quadrature amplitude modulated signals to be represented in the IQ coordinate plane of a display screen, under control of a digital signal processor. Each individual IQ value provided by the demodulator is assigned a data memory address. Each address is associated with a pixel of the display screen which holds the corresponding pixel retention time. Every address is associated with at least one IQ value and the processor is directly connected to the output of the demodulator. |
