发明名称 Single-pass methods for generating test patterns for sequential circuits
摘要 A single-pass method for generating test patterns for sequential circuits operates upon an iterative array of time-frames representing the circuit. A mapping function is inserted at the end of each time-frame. Fault objects arriving at circuit next-state lines are mapped into good next-state fault objects and are placed onto corresponding present-state lines for a next time-frame. The good next-state mapping permits fault-propagation and path-enabling function size to be bounded by a size established during an initial time-frame. Path-enabling functions created during the initial time-frame are saved and are reused during subsequent time-frames. A search for test patterns continues from one time-frame to a next until a valid test pattern is found for each detectable fault.
申请公布号 US7231571(B2) 申请公布日期 2007.06.12
申请号 US20050908146 申请日期 2005.04.28
申请人 YARDSTICK RESEARCH, L.L.C. 发明人 BUCKLEY, JR. DELMAS R.
分类号 G01R31/28;G01R31/3183;G06F11/00 主分类号 G01R31/28
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