| 摘要 |
Delta/sigma frequency discriminator ( 1 ) for converting a frequency (F<SUB>v</SUB>) of an input signal into a digital output signal (C) comprising a frequency divider ( 8 ) which divides the input signal at a frequency dividing ratio which can be switched in dependence on the digital output signal (C), with at least one sampling register ( 12 ) which samples the divided input signal by means of a reference clock signal for generating the digital output signal (C), and with a dither circuit ( 15 ) which varies the clock period (T) of the reference clock signal so that interfering modulation tones in the signal spectrum of the digital output signal (C) are suppressed.
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