发明名称 Memory cell having p-type pass device
摘要 For one disclosed embodiment, an apparatus comprises a first p-type device coupled between a cell voltage node and a storage node, an n-type device coupled between the storage node and a reference voltage node, and a second p-type device to couple the storage node to a bit line in response to a signal on a select line. At least one side of diffusion regions in a substrate to form both the first p-type device and the second p-type device are substantially aligned. Other embodiments are also disclosed.
申请公布号 US7230842(B2) 申请公布日期 2007.06.12
申请号 US20050225912 申请日期 2005.09.13
申请人 INTEL CORPORATION 发明人 KHELLAH MUHAMMAD M.;SOMASEKHAR DINESH;KIM NAM SUNG;YE YIBIN;DE VIVEK K.;ZHANG KEVIN;ZHENG BO
分类号 G11C11/00 主分类号 G11C11/00
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