发明名称 Advanced bandwidth allocation in PCI bus architecture
摘要 A bus arbitration system and method allocates total bus bandwidth between latency sensitive and latency insensitive interfaces by utilizing windows to divide the total bandwidth into latency sensitive and latency insensitive portions. Each interface is initially allocated top-up numbers of latency sensitive and latency insensitive tokens to proportionally allocate bus accesses between the interfaces according to their requirements. For an interface having access to the bus, the number of tokens is decremented for each successful bus transfer.
申请公布号 US7231475(B1) 申请公布日期 2007.06.12
申请号 US20040768924 申请日期 2004.01.30
申请人 CISCO TECHNOLOGY, INC. 发明人 SINGLA ANKUR;NAKIL HARSHAD;REDDY RAJASHEKAR
分类号 G06F13/362 主分类号 G06F13/362
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