CROSSBAR SWITCH ARCHITECTURE FOR MULTI-PROCESSOR SOC PLATFORM

摘要

A crossbar switch architecture suitable for a multi-processor SoC platform is provided to realize excellent expandability when a master or slave device is added, realize fast data transfer while realizing the expandability of a satisfied level, and improve whole system performance by reducing data delay with the shortest transfer path. Each 2X2 multiplexer(300-333) connects one input line with an output line of the multiplexer placed in a previous row of in the same column, and connects another input line with the output line of the multiplexer placed at the previous column of the same row or the input/output line of the row including the multiplexer. The output line of the last column multiplexers of each row is connected to the input/output line of the current column. Each input/output line of the columns is connected to slaves(370-373) and each input/output line of the rows is connected to masters(360-363). A controller(350) determines a connection path of each 2X2 multiplexer according to interpretation of a received instruction.