发明名称 DIGITAL PULSE WIDTH MODULATION GENERATOR WITH CLOCK DIVIDER AND CLOCK SYNTHESIZER
摘要 A digital PWM(Pulse Width Modulation) generator using a clock divider and a clock synthesizer is provided to reduce a size of a circuit and increase compatibility with an external digital system by changing an analog PWM process of a saw tooth wave or latch structure into a digital PWM circuit which divides and synthesizes a reference clock. A digital PWM generator using a clock divider and a clock synthesizer includes a clock generator(1), a clock divider(2), a clock selection unit(3), a clock control unit(5), a clock synthesizer(4), and a pulse width adjusting unit(6). The clock generator(1) generates an internal reference clock of a system. The clock divider(2) divides the generated reference clock into N clocks. The clock selection unit(3) selectively transmits some clocks to the clock synthesizer(4) according to a control signal which is transmitted from the clock control unit(5) of a plurality of clocks divided by the clock divider(2). The clock control unit(5) analyzes a control signal or a command selected by an external system using an SMPS(Switching Mode Power Supply). The clock control unit(5) controls the clock selection unit(3) in a normal mode by transmitting the control signal to the clock selection unit(3) or checking a load change of the SMPS. The clock synthesizer(4) synthesizes and converts signals selected from the clock selection unit(3) into PWM signals. The pulse width adjusting unit(6) analyzes and transmits a load change signal of the SMPS to the clock control unit(5).
申请公布号 KR100729845(B1) 申请公布日期 2007.06.12
申请号 KR20060073219 申请日期 2006.08.03
申请人 KOREA ELECTRO TECHNOLOGY RESEARCH INSTITUTE 发明人 KIM, KI HYUN;KIM, HYUNG WOO;SEO, GIL SU;KIM, SANG CHEOL;BANG, WOOK;KANG, IN HO;KIM, NAM KYUN
分类号 H03K7/08;H03K21/00 主分类号 H03K7/08
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