| 摘要 |
A semiconductor cell block and a method for a cell block layout are provided to secure the margin for separating a well without the variation of size of the semiconductor cell block itself and to reduce the number of signal lines. A semiconductor cell block includes a deep N well, a P well, an N well, a first terminal region and a second terminal region. The deep N well(25) is formed in a semiconductor substrate(20) except for a first region. The P well(22) is formed within the deep N well. The N well(23) is formed within the first region and a second region, respectively. The first terminal region is used for applying a first back bias to the N well of the first region. The second terminal region is used for applying a second back bias to the deep N well.
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