| 摘要 |
PROBLEM TO BE SOLVED: To make it possible to perform an efficient multi-task operation by using a multi-core processor so as to be made adaptable to a signal processing system or the like with severe time response performance. SOLUTION: Core processors 11 to 13L1 are provided with memories 21 to 23 respectively. The core-processors 11 to 13 operate an OS of single stack, their degrees of priority are set, for example, to "core 0<core 1<core 2" and connected to an internal bus 14 and an external bus 15. A plurality of L2 memories 31 to 34 are connected to the internal bus 14. In the core processors 11 to 13 and the L2 memories 31 to 34, multiple connection of the internal bus is spatially made and the core processors 11 to 13 and the L2 memories 31 to 34 are connected so that the core processor 12 accesses to the memory 32 and the core processor 13 access the L2 memory 34 simultaneously while the core processor 11 accesses the L2 memory 32. COPYRIGHT: (C)2007,JPO&INPIT
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