发明名称 METHOD FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor integrated circuit in which a momentary current is widely suppressed and a dummy pattern does not become a noise source to the existing wiring. SOLUTION: The method for manufacturing the semiconductor integrated circuit provided with the dummy pattern for adjusting signal wirings that connect function elements onto a semiconductor substrate and the function elements to each other, each wiring including a power source/grand wiring and the wiring area rate of each wiring, includes an arrangement/wiring step S11 for determining the layout of the function elements and each wiring on the basis of function information of the semiconductor integrated circuit; a dummy pattern wiring region extracting step S12 for extending at least any wiring of the respective wirings in a width direction to form an extended wiring region and subsequently extracting an inverted region of the extended wiring region to form a part where the dummy pattern is provided; and a dummy pattern generating step S13 for generating a dummy pattern in a direction perpendicular to the wiring direction of each wiring in the dummy pattern wiring region. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007141037(A) 申请公布日期 2007.06.07
申请号 JP20050335537 申请日期 2005.11.21
申请人 SHARP CORP 发明人 KADOTA AKINOBU
分类号 G06F17/50;H01L21/82;H01L21/822;H01L27/04 主分类号 G06F17/50
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