| 摘要 |
<p>A nonvolatile semiconductor memory and its manufacturing method are provided to reduce remarkably a parasitic capacitance between adjacent memory cells, to improve the degree of integration and to reduce the consumption of power. A semiconductor layer(14) is formed on an insulating layer(12). A plurality of active regions are arranged in the semiconductor layer. The active regions are isolated from each other by using isolation regions. A plurality of word lines are prolonged along a row direction of the resultant structure. A plurality of memory cell transistors are arranged on the semiconductor layer like a matrix type structure. Each memory cell transistor includes source/drain regions(16) on the active regions, a floating gate polysilicon electrode layer(4) on the semiconductor layer via a tunneling insulating layer(18), an inter-gate dielectric(25) on the floating gate polysilicon electrode layer, and a control gate metal electrode layer(70) on the floating gate polysilicon electrode layer via the inter-gate dielectric.</p> |
