METHOD FOR FORMING MULTI-LEVEL METAL LINE OF SEMICONDUCTOR DEVICE

摘要

A method for forming a multilayered metal interconnection of a semiconductor device is provided to control an abnormal reaction phenomenon of the foreign substances generated in forming a metal interconnection and an interlayer dielectric by forming a capping layer before the interlayer dielectric is formed. A wiring metal layer is formed on a semiconductor substrate(100). The wiring metal layer is etched to form a metal interconnection(110). A capping layer(120) is formed on the resultant structure to cover the foreign substances generated in formed the metal interconnection, made of a nitride-based layer such as a nitride layer or an oxynitride layer. An interlayer dielectric(130) is formed on the capping layer. A CMP process is performed on the interlayer dielectric to planarize the surface of the interlayer dielectric. The interlayer dielectric and the capping layer are etched to form a contact hole(140) exposing the metal interconnection.