发明名称 STACK TYPE PACKAGE
摘要 A stack-type package is provided to reduce the whole thickness of a stack-type package by forming a groove in one surface of a substrate and by installing a chip in the groove. A groove is formed in the center of one surface of a substrate(110), and a pair of lower bumps(122) and a pair of upper bumps(121) are respectively formed in the groove and the other surface of the substrate. A lower chip(150) is mounted on the lower bump. An upper chip(140) is mounted on the upper bump. The upper and lower chips are sealed by EMC(160). Solder balls(170) are formed at both lateral portions of one surface of the substrate. An underfill layer(130) having the same height as that of the lower bump is formed in the groove, and an underfill layer(130) having the same height as that of the upper bump is formed between the upper bumps on the other surface of the substrate.
申请公布号 KR20070058125(A) 申请公布日期 2007.06.07
申请号 KR20050116438 申请日期 2005.12.01
申请人 HYNIX SEMICONDUCTOR INC. 发明人 LEE, KANG WON
分类号 H01L23/12 主分类号 H01L23/12
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