发明名称 Integrated circuit device gate structures and methods of forming the same
摘要 Methods of forming a gate structure for an integrated circuit memory device include forming a first dielectric layer having a dielectric constant of under 7 on an integrated circuit substrate. Ions of a selected element from group 4 of the periodic table and having a thermal diffusivity of less than about 0.5 centimeters per second (cm<SUP>2</SUP>/s) are injected into the first dielectric layer to form a charge storing region in the first dielectric layer with a tunnel dielectric layer under the charge storing region. A metal oxide second dielectric layer is formed on the first dielectric layer, the second dielectric layer. The substrate including the first and second dielectric layers is thermally treated to form a plurality of discrete charge storing nano crystals in the charge storing region and a gate electrode layer is formed on the second dielectric layer. Gate structures for integrated circuit devices and memory cells are also provided.
申请公布号 US2007128846(A1) 申请公布日期 2007.06.07
申请号 US20060510059 申请日期 2006.08.25
申请人 CHOI SAM-JONG;KIM YONG-KWON;CHO KYOO-CHUL;KIM KYUNG-SOO;JUNG JAE-RYONG;KANG TAE-SOO;KIM SANG-SIG 发明人 CHOI SAM-JONG;KIM YONG-KWON;CHO KYOO-CHUL;KIM KYUNG-SOO;JUNG JAE-RYONG;KANG TAE-SOO;KIM SANG-SIG
分类号 H01L21/4763 主分类号 H01L21/4763
代理机构 代理人
主权项
地址