发明名称 System-On-a-Chip mixed bus architecture
摘要 A mixed architecture system on chip is provided by combining a CoreConnect system on chip architecture with an AMBA system on chip architecture. To eliminate data transfer and bus error that could occur in the mixed architecture, an additional peripheral bus and bridge are provided to manage communication with AHB resources.
申请公布号 US2007130409(A1) 申请公布日期 2007.06.07
申请号 US20050295117 申请日期 2005.12.06
申请人 MATSUSE SHUHSAKU;UEDA MAKOTO 发明人 MATSUSE SHUHSAKU;UEDA MAKOTO
分类号 G06F13/36 主分类号 G06F13/36
代理机构 代理人
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