| 摘要 |
The disclosed embodiments relate to a low cost signal adjustment or calibration method and apparatus for generating a stable clock signal that is used to drive a communications interface (e.g., a UART port (76)). More specifically, a processor (61) within a microcontroller (60) uses a low frequency crystal oscillator (72) and a scaling module (78) to remove a frequency offset error contained in an unstable clock signal generated by a high frequency RC oscillator (64). The processor detects and removes the frequency offset error when specific triggering events occur such as when the microcontroller is powered up, awaken from a sleep or stand by mode, or experiences a communications error.
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