| 摘要 |
A method for forming an MIM(Metal-Insulator-Metal) capacitor in a semiconductor device is provided to increase a process margin at a next etching process by forming a dielectric passivation having good selection ratio to a metal layer formed on an upper conductive layer. A lower conductive layer(30), a dielectric layer(40), an upper conductive layer(50), and a dielectric passivation(100) are sequentially stacked on a semiconductor substrate(10) with an insulation layer(20). A photolithography process is performed on the substrate to form an upper electrode, and then the upper electrode is planarized. A photolithography process is performed on the substrate to form a lower electrode, and the lower electrode is patterned. After an insulation layer is deposited, and the substrate is subjected to a via contact forming process and a metal wiring forming process.
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