| 摘要 |
The invention relates to a clock signal correction method, and to a clock signal input/output device into which a clock signal or a signal obtained therefrom is input and transmitted to a frequency divider, wherein a signal output by the frequency divider is transmitted to a signal integrator, and wherein a signal output by the signal integrator is transmitted to a first signal comparison circuit, wherein the signal output by the frequency divider is additionally transmitted to a second signal comparison circuit, and wherein the clock signal input/output device additionally comprises a signal input circuit for outputting a clock output signal as a function of a signal output by the first signal comparison circuit, and of a signal output by the second signal comparison circuit.
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