发明名称 Transistor fabrication using double etch/refill process
摘要 A semiconductor fabrication process includes forming a gate electrode ( 120 ) overlying a gate dielectric ( 110 ) overlying a semiconductor substrate ( 102 ). First spacers ( 124 ) are formed on sidewalls of the gate electrode ( 120 ). First s/d trenches ( 130 ) are formed in the substrate ( 102 ) using the gate electrode ( 120 ) and first spacers ( 124 ) as a mask. The first s/d trenches ( 130 ) are filled with a first s/d structure ( 132 ). Second spacers ( 140 ) are formed on the gate electrode ( 120 ) sidewalls adjacent the first spacers ( 124 ). Second s/d trenches ( 150 ) are formed in the substrate ( 102 ) using the gate electrode ( 120 ) and the second spacers ( 140 ) as a mask. The second s/d trenches ( 150 ) are filled with a second s/d structure ( 152 ). Filling the first and second s/d trenches ( 130, 150 ) preferably includes growing the s/d structures using an epitaxial process. The s/d structures ( 132, 152 ) may be stress inducing structures such as silicon germanium for PMOS transistors and silicon carbon for NMOS transistors.
申请公布号 US7226820(B2) 申请公布日期 2007.06.05
申请号 US20050101354 申请日期 2005.04.07
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 ZHANG DA;LIU JING;NGUYEN BICH-YEN;THEAN VOON-YEW;WHITE TED R.
分类号 H01L21/00 主分类号 H01L21/00
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