发明名称 |
Circuit and method for reducing direct current biases |
摘要 |
A method is provided for reducing a DC bias in a receiver. This method includes isolating a second circuit portion from a first circuit portion ( 535 ) and determining a second DC bias correction value for the second circuit portion that will eliminate a second DC bias at the isolated second circuit portion ( 540 ). The second circuit portion is then connected to the first circuit portion ( 550 ) and a bias-maximizing code word is generated at the first circuitry ( 505 ). A first DC bias correction value is then determined that will eliminate a first DC bias at the first circuit portion ( 555 ). The bias-maximizing code word is formed such that: a first integrated value of a first half of the bias-maximizing code word has a positive value, and a second integrated value of a second half of the bias-maximizing code word over half of the code word length has a negative value.
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申请公布号 |
US7228120(B2) |
申请公布日期 |
2007.06.05 |
申请号 |
US20040990400 |
申请日期 |
2004.11.18 |
申请人 |
FREESCALE SEMICONDUCTOR, INC. |
发明人 |
JOHNSON TERENCE L.;SHARMA NITIN;LOBO RYAN W. |
分类号 |
H04B1/10 |
主分类号 |
H04B1/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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