发明名称 MEMORY DEVICE UTILIZING NANO-DOT AS TRAP SITE, AND MANUFACTURING METHOD FOR THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a memory device utilizing nano-dots as a trap site, and a manufacturing method for the memory device. SOLUTION: The memory device incorporates a semiconductor substrate 20, and a gate structure which makes contact with a primary impurity region 21a and a secondary impurity region 22b both being formed on the semiconductor substrate 20 while formed on the semiconductor substrate 20. The gate structure includes a tunneling layer 22, many nano-dots 24 formed on the tunneling layer 22, and a control insulating layer formed on the tunneling layer 22 and the nano-dots 24, wherein the control insulating layer includes a high dielectric layer. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007134720(A) 申请公布日期 2007.05.31
申请号 JP20060304422 申请日期 2006.11.09
申请人 SAMSUNG ELECTRONICS CO LTD 发明人 SETSU KOSHU;KIM BYUNG-KI;LEE EUN-KYUNG;MIN YO-SEP;CHO KYUNG-SANG;LEE JAE-HO;CHOI JAI-YOUNG
分类号 H01L21/8247;H01L27/115;H01L29/788;H01L29/792 主分类号 H01L21/8247
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