发明名称 SCHEDULING IN MULTICORE ARCHITECTURE
摘要 <P>PROBLEM TO BE SOLVED: To provide a method of scheduling executable transactions, often referred to as threads, within a multicore processor. <P>SOLUTION: Executable transactions may be scheduled using at least one distribution queue, which lists executable transactions in order of eligibility for execution, and a multilevel scheduler which comprises a plurality of linked individual executable transaction schedulers. Each of these includes a scheduling algorithm for determining the most eligible executable transaction for execution. The most eligible executable transaction is output from the multilevel scheduler to the at least one distribution queue. <P>COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007133858(A) 申请公布日期 2007.05.31
申请号 JP20060270890 申请日期 2006.10.02
申请人 COWARE INC;FUJITSU LTD 发明人 LIPPETT MARK DAVID
分类号 G06F9/48;G06F1/00;G06F1/32 主分类号 G06F9/48
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