| 摘要 |
PROBLEM TO BE SOLVED: To provide a method of manufacturing semiconductor by which peeling of an interlayer film and a variation of processing characteristic in a damascene wiring process can be suppressed. SOLUTION: This method includes a step to form first interlayer films 5 and 6 on a semiconductor substrate 1, a step to form a wiring groove 7 in the first interlayer films 5 and 6, a step to form a peripheral groove 8 in the periphery of the first interlayer films 5 and 6, a step to form metal films 9 and 10 in the wiring groove 7 and the peripheral groove 8, and a step to form a second interlayer film 12 at least on the metal films 9 and 10. COPYRIGHT: (C)2007,JPO&INPIT
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