发明名称 SUBSTRATE-LEVEL ASSEMBLY FOR AN INTEGRATED DEVICE, MANUFACTURING PROCESS THEREOF AND RELATED INTEGRATED DEVICE
摘要 In a substrate-level assembly (22), a device substrate (20) of semiconductor material has a top face (20a) and houses a first integrated device (1; 16), in particular provided with a buried cavity (3), formed within the device substrate (20), and with a membrane (4), suspended over the buried cavity (3) in the proximity of the top face (20a). A capping substrate (21) is coupled to the device substrate (20) above the top face (20a) so as to cover the first integrated device (1; 16), in such a manner that a first empty space (25) is provided above the membrane (4). Electrical-contact elements (28a, 28b) electrically connect the integrated device (1; 16) with the outside of the substrate-level assembly (22). In one embodiment, the device substrate (20) integrates at least a further integrated device (1', 10) provided with a respective membrane (4'); and a further empty space (25'), fluidically isolated from the first empty space (25), is provided over the respective membrane (4') of the further integrated device (1', 10).
申请公布号 WO2007042336(A3) 申请公布日期 2007.05.31
申请号 WO2006EP64298 申请日期 2006.07.14
申请人 STMICROELECTRONICS S.R.L.;COMBI, CHANTAL;VIGNA, BENEDETTO;ZIGLIOLI, FEDERICO GIOVANNI;BALDO, LORENZO;MAGUGLIANI, MANUELA;LASALANDRA, ERNESTO;RIVA, CATERINA 发明人 COMBI, CHANTAL;VIGNA, BENEDETTO;ZIGLIOLI, FEDERICO GIOVANNI;BALDO, LORENZO;MAGUGLIANI, MANUELA;LASALANDRA, ERNESTO;RIVA, CATERINA
分类号 B81B7/02;B81B7/00 主分类号 B81B7/02
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