MULTI THREAD PROCESSOR HAVING DYNAMIC RECONFIGURATION LOGIC CIRCUIT
摘要
<p>A processor cyclically executes a plurality of threads by a time allocated for each of the threads. The processor stores cell configuration information on each operation cell corresponding to each of the threads for repeatedly executing different particular numbers of operation cells in rotation and successively reconfigures an operation cell which has completed the last operation in the time allocated for the current thread according to the cell configuration information on the operation cell corresponding to the next thread stored, so that the operation cell of the configuration corresponding to the next thread and the operation cell corresponding to the configuration of the current thread are simultaneously executed.</p>
申请公布号
WO2007060932(A1)
申请公布日期
2007.05.31
申请号
WO2006JP323177
申请日期
2006.11.21
申请人
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.;MAEDA, MASAKI;NISHIDA, HIDESHI;WAKAYAMA, YORIHIKO