发明名称 Individualized Low Parasitic Power Distribution Lines Deposited Over Active Integrated Circuits
摘要 An integrated circuit (IC) chip, mounted on a leadframe, has a network of power distribution lines deposited on the surface of the chip so that these lines are located over active components of the IC, connected vertically by metal-filled vias to selected active components below the lines, and also by conductors to segments of the leadframe. Furthermore, the lines are fabricated with a sheet resistance of less than 1.5 mOmega/. and the majority of the lines is patterned as straight lines between the vias and the conductors, respectively.
申请公布号 US2007122944(A1) 申请公布日期 2007.05.31
申请号 US20060539486 申请日期 2006.10.06
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 EFLAND TAYLOR R.;BUSCHBOM MILTON L.;PENDHARKAR SAMEER
分类号 H01L21/60;H01L23/485;H01L23/528 主分类号 H01L21/60
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