发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device which can markedly shorten time for testing a memory cell part with a small number of additional circuits. <P>SOLUTION: The semiconductor integrated circuit device has: SRAM type memory cells 11a; a memory cell arrays where the memory cells 11a are arranged repeatedly in the directions of rows and columns; a pair of bit lines 12a and 12b connected to each column in the memory cell array in common for writing complement data signal to the memory cells 11a and for reading it from the memory cells 11a; a word line WK connected to each row in the memory cell array in common; a row decoder 13 for driving the word line WK so as to select all the rows in the memory cell array when testing; and a current restriction circuit 14 connected between a main power source line and the power source of the memory cells 11a and controlled to supply current smaller than that in normal operation to the memory cell 11a when test reading. <P>COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007134001(A) 申请公布日期 2007.05.31
申请号 JP20050327811 申请日期 2005.11.11
申请人 TOSHIBA MICROELECTRONICS CORP;TOSHIBA CORP 发明人 UTSUNOMIYA TAKANORI;KOBAYASHI TOSHIAKI
分类号 G11C29/14;G01R31/28;G11C11/413;G11C29/10 主分类号 G11C29/14
代理机构 代理人
主权项
地址