发明名称
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a technique for forming a stacked via-hole structure in which via holes are superposed in many stages in a proper positional accuracy by improving a method for manufacturing a multilayer printed circuit board by a building up method using a conventional copper foil with a resin. <P>SOLUTION: When the first via hole is formed at an inner layer side, a via hole aligning hole which can confirm the position of the first via hole is provided. The second bottom land of the second via hole can be formed and aligned at the position of the first via hole in a high accuracy by detecting a transmitted light from the via hole aligning hole. <P>COPYRIGHT: (C)2004,JPO</p>
申请公布号 JP3923408(B2) 申请公布日期 2007.05.30
申请号 JP20020306839 申请日期 2002.10.22
申请人 发明人
分类号 B23K26/00;H05K3/46;B23K26/38;B23K101/42;H05K3/00 主分类号 B23K26/00
代理机构 代理人
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