发明名称 Semiconductor device that includes a silicide region that is not in contact with the lightly doped region
摘要 There is disclosed a method of fabricating TFTs having reduced interconnect resistance by having improved contacts to source/drain regions. A silicide layer is formed in intimate contact with the source/drain regions. The remaining metallization layer is selectively etched to form a contact pad or conductive interconnects.
申请公布号 US7223666(B2) 申请公布日期 2007.05.29
申请号 US20050033279 申请日期 2005.01.12
申请人 SEMICONDUCTOR ENERGY LABORATORY CO., LTD. 发明人 OHTANI HISASHI;FUJIMOTO ETSUKO
分类号 H01L29/76;H01L29/78;H01L21/336;H01L21/77;H01L21/84;H01L27/12;H01L29/45;H01L29/786 主分类号 H01L29/76
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