发明名称 MAINTAINING INTERNAL VOLTAGE OF INTEGRATED CIRCUIT IN RESPONSE TO CLOCKED STANDBY MODE
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a method and a device for controlling an output reference voltage generated by a reference voltage generator arranged on a memory device. <P>SOLUTION: A signal for enabling a clocked standby mode of a memory device is received. When this signal indicates that the above memory device is in the clocked standby mode, a first reference voltage is generated as an output reference voltage of the above reference voltage generator by using the first voltage. When the above signal indicates that the above memory device is not in a clocked standby mode, a second reference voltage is generated as an output reference voltage of the above reference voltage generator by using the second voltage. <P>COPYRIGHT: (C)2007,JPO&INPIT</p>
申请公布号 JP2007128632(A) 申请公布日期 2007.05.24
申请号 JP20060210182 申请日期 2006.08.01
申请人 QIMONDA AG 发明人 ALEXANDER GEORGE WILLIAM;HEILMANN BEN;HERBERT DAVID
分类号 G11C11/4074;G05F1/10;G05F3/02;G06F1/26;G11C11/413 主分类号 G11C11/4074
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