发明名称 SHARED PIPELINE ARCHITECTURE FOR MOTION VECTOR PREDICTION AND RESIDUAL DECODING
摘要 A shared pipeline architecture is provided for H.264 motion vector prediction and residual decoding, and intra prediction for CABAC and CALVC entropy in Main Profile and High Profile for standard and high definition applications. All motion vector predictions and residual decoding of I-type, P-type, and B-type pictures are completed through the shared pipeline. The architecture enables better performance and uses less memory than conventional architectures. The architecture can be completely implemented in hardware as a system-on-chip or chip set using, for example, field programmable gate array (FPGA) technology or application specific integrated circuitry (ASIC) or other custom-built logic.
申请公布号 WO2006063343(A3) 申请公布日期 2007.05.24
申请号 WO2005US44892 申请日期 2005.12.09
申请人 WIS TECHNOLOGIES, INC.;LIN, TENG, CHIANG;ZENG, WEIMIN 发明人 LIN, TENG, CHIANG;ZENG, WEIMIN
分类号 H04N7/12 主分类号 H04N7/12
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