发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor memory device in which active current is reduced by reducing the number of sense amplifiers to be simultaneously activated. SOLUTION: This SDRAM has a divided word line structure, and includes a plurality of banks. Each bank BNK0 includes arrays AR1 to 64 and a main word line MWL of 4K. A row address signal is captured according to a row address strobe signal, and a segment address signal is captured according to a column address strobe signal. A main row decoder MRD simultaneously activates main word lines MWL1, 5, 9 and 13 according to the row address signal. The segment row decoder SRD selects only the array AR1 according to the segment address signal, and activates only a sense amplifier SA of 1K corresponding to the selected array AR1. The main word lines MWL1, 5, 9 and 13 are activated, however the segment word lines of the arrays 2 to 64 are not activated, and no data is therefore destroyed. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007128610(A) 申请公布日期 2007.05.24
申请号 JP20050320982 申请日期 2005.11.04
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 SUNANAGA TOSHIO
分类号 G11C11/401 主分类号 G11C11/401
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