Semiconductor memory device e.g. dynamic random access memory device, has bit lines forming set of bit line pairs, where lines in one pair are rotated at center between pair of transfer gates on opposite sides of sense amplifier section

摘要

The device has a divided sense amplifier section (SA), and a pair of memory cell arrays (MA-L, MA-R) arranged on opposite sides of the amplifier section. A pair of transfer gates (TG-L, TG-R) is arranged on the opposite sides of the amplifier section and between the cell arrays and the amplifier section. Bit lines (D, DB) form a set of bit line pairs and connect the pair of cell arrays with one another by the transfer gates and the amplifier section. The bit lines in one of the bit line pairs are rotated at the center between the transfer gates on the opposite sides of the amplifier section. An independent claim is also included for a divided sense amplifier section for use in a semiconductor memory device.