发明名称 CLOCK EDGE MODULATED SERIAL LINK INCLUDING DC BALANCE CONTROL
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a serial channel for supporting clocks, data and control signals such as DC balancing control signals to a low power mobile device. <P>SOLUTION: A battery powered computing device has a channel arranged as a single direct current balanced differential channel. A signal transmitter is connected to the channel. The signal transmitter is arranged to apply clock edge modulated signals to the channel, wherein the clock edge modulated signals include direct current balancing control signals. A signal receiver is connected to the channel. The signal receiver is arranged to recover the direct current balancing control signals. <P>COPYRIGHT: (C)2007,JPO&INPIT</p>
申请公布号 JP2007129735(A) 申请公布日期 2007.05.24
申请号 JP20060322567 申请日期 2006.10.31
申请人 SILICON IMAGE INC 发明人 KIM GYUDONG;CHOE WON JUN;JEONG DEOG-KYOON;KIM JAEHA;LEE BONG-JOON;KIM MIN-KYU
分类号 H04L27/00 主分类号 H04L27/00
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