| 发明名称 |
DATA PROCESSING SYSTEM WITH MEANS TO CONVERT BURST OPERATIONS INTO PIPELINED OPERATIONS |
| 摘要 |
A data processing system includes a microprocessor operable in a burst mode to read data from a memory. The memory, its controller and bus are operable in a pipelining mode. Array logic is connected between the microprocessor and the remaining elements for converting the burst mode to the pipeline mode.
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| 申请公布号 |
CA2018065(C) |
申请公布日期 |
1996.01.02 |
| 申请号 |
CA19902018065 |
申请日期 |
1990.06.01 |
| 申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
BEGUN, RALPH MURRAY |
| 分类号 |
G06F13/36;G06F12/00;G06F12/02;G06F13/28;G06F13/42;(IPC1-7):G06F13/16;G06F9/38 |
主分类号 |
G06F13/36 |
| 代理机构 |
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