发明名称 |
METHOD AND APPARATUS FOR FREQUENCY SYNTHESIS. |
摘要 |
<p>A DPC (200) that includes: a frequency source (20); a delay-locked loop (220)for receiving a clock signal and generating a plurality of phase-shifted clocksignals; a control device (280) having a DPS (282) and a DAC (284) for receivingan input signal identifying a desired frequency for a synthesized signal; a selectioncircuit (270) for receiving the plurality of phase-shifted clock signals, selectinga sequence of the phase-shifted clock signals and outputting a coarse synthesizedsignal; a variable delay cell (290) having a first input coupled to the selectioncircuit to receive the coarse synthesized signal and a second input coupled tothe control device for receiving a fine tune adjustment signal to modify the coarsesynthesized signal to generate the synthesized signal (292) having substantiallythe desired frequency. The DPC further includes training apparatus for calibratingthe DPC.</p> |
申请公布号 |
MX2007003745(A) |
申请公布日期 |
2007.05.23 |
申请号 |
MX20070003745 |
申请日期 |
2005.09.12 |
申请人 |
MOTOROLA, INC. |
发明人 |
MANUEL P. GABATO, JR.;JOSEPH A. CHARASKA;PAUL H. GAILUS |
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