发明名称 |
Semiconductor integrated circuit design tool, computer implemented method for designing semiconductor integrated circuit, and method for manufacturing semiconductor integrated circuit |
摘要 |
A semiconductor integrated circuit design tool includes a reference data defining module configured to define design data of one of a plurality of transistors implementing the semiconductor integrated circuit as reference data, a simulator configured to simulate each effective channel length of the transistors, based on the design data and a reference channel length based on the reference data, and an adjuster configured to adjust gate lengths of gate electrodes of the transistors to reduce a difference between the effective channel length and the reference channel length.
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申请公布号 |
US7222328(B2) |
申请公布日期 |
2007.05.22 |
申请号 |
US20050200263 |
申请日期 |
2005.08.10 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
HASUMI RYOJI;IWAI MASAAKI |
分类号 |
G06F17/50;G03F1/36;G03F1/68;G03F1/70;G03F7/20;H01L21/00;H01L21/027;H01L21/82;H01L21/8234;H01L21/8238;H01L27/088;H01L27/092 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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