METHOD AND SYSTEM FOR MODELING OF A DIFFERENTIAL BUS DEVICE

摘要

Aspects of efficient modeling of a differential bus device in an ASIC library include utilizing a hardware description language (HDL) to model a differential bus device. A mapping scheme based on signal strengths of the HDL (200) is utilized to represent a set of differential bus signals as single bits during simulation (210) of the differential bus device. Further, the differential bus device comprises a USB device, and the HDL comprises Verilog.