发明名称 AN APPARATUS AND METHOD FOR AN ITERATIVE CRYPTOGRAPHIC BLOCK
摘要 A method and apparatus for an iterative cryptographic block (410) under the control of a CPU (210) and without a fixed number of stages. IQ one embodiment, a first cryptographic block (410) descrambles received information (424) using an internal key (470) or a preprogrammed key (472) to form a descrambled key or descrambled data. A data feedback path stores the descrambled data as internal data (442) and provides the internal data or the external data as data input to the first cryptographic block (410). A key feedback path stores the descrambled key as an internal key (470) and provides the internal key or the preprogrammed key to a key input of the first cryptographic block (410). A second cryptographic block (310) descrambles received content (222) using a final descrambling key. Other embodiments are described and claimed.
申请公布号 WO2005084160(A3) 申请公布日期 2007.05.18
申请号 WO2004US22037 申请日期 2004.07.07
申请人 SONY ELECTRONICS, INC.;CANDELORE, BRANT 发明人 CANDELORE, BRANT
分类号 G06F21/00;H04N5/913;H04N7/16;H04N7/167 主分类号 G06F21/00
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