发明名称 Logic circuit for performing e.g. AND operation in microprocessor, has control input, where clock signal determines if switching unit is opened or closed, and common connection is connected with voltage potential if switching unit is closed
摘要 <p>The circuit has a switching unit (6) that is connected with a common connection of unidirectional circuit arrangement (5) and with a supply voltage. A clock signal is supplied over a control input (ST), where the clock signal determines if the switching unit is opened or closed. The common connection of the unidirectional circuit arrangement is connected with a voltage potential if the switching unit is closed.</p>
申请公布号 DE102005053750(A1) 申请公布日期 2007.05.16
申请号 DE20051053750 申请日期 2005.11.10
申请人 BEDENK, GEORG 发明人 BEDENK, GEORG
分类号 H03K19/12;H03K19/20 主分类号 H03K19/12
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