发明名称 Reconfigurable trace cache
摘要 According to one embodiment a computer system is disclosed. The computer system includes a microprocessor and a chipset coupled to the microprocessor. The microprocessor removes stale branch instructions prior to the execution of a first cache line by finding existing branch prediction data for the first cache line.
申请公布号 US7219207(B2) 申请公布日期 2007.05.15
申请号 US20030726838 申请日期 2003.12.03
申请人 INTEL CORPORATION 发明人 KIM SANGWOOK;ADHIKARI DHANANJAY;YOAZ ADI
分类号 G06F12/00;G06F9/38 主分类号 G06F12/00
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