发明名称 Burst transfer register arrangement
摘要 Machine-readable media, methods, and apparatus are described to burst write a command and its arguments to control registers of a device and to burst read status and outputs of the command from control registers of the device. During the burst write, the arguments may be transferred to the device in a reverse order in which the last argument is transferred first and the first argument is transferred last. Further, the command may be transferred after the arguments.
申请公布号 US7219170(B2) 申请公布日期 2007.05.15
申请号 US20030728677 申请日期 2003.12.04
申请人 INTEL CORPORATION 发明人 JANUS SCOTT R.
分类号 G06F13/00;G06F15/00;G06T1/00 主分类号 G06F13/00
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