发明名称 Method of accessing matrix data with address translation circuit that enables quick serial access in row or column directions
摘要 A method of accessing matrix data of a semiconductor memory having memory banks. The memory banks each having memory cells arranged in X and Y directions, a Y decoder for selecting Y-direction addresses of the memory cells and an X decoder for selecting X-direction addresses of the memory cells, predicated on the memory banks being operable independently. Items of data specified by a specified number of continuous X addresses and having the same Y addresses are successively written into or read from the memory cells arranged in the X direction, which are specified by X addresses corresponding to 1+knth in one of the banks. After all data have been written into or read from the specified memory cells, corresponding data are successively written into or read from the memory cells specified by X addresses corresponding to 2+knth in another one of the banks.
申请公布号 US7219200(B2) 申请公布日期 2007.05.15
申请号 US20050143860 申请日期 2005.06.03
申请人 OKI ELECTRIC INDUSTRY CO., LTD. 发明人 TAKASUGI ATSUSHI
分类号 G06F12/06;G11C11/401;G06F12/02;G09G5/39;G11C7/00;G11C8/00;G11C8/04;G11C8/08;G11C8/12 主分类号 G06F12/06
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