发明名称 Hot-carrier reliability design rule checker
摘要 The present invention is directed to methods for reliability simulations in aged circuits whose operation has been degraded through hot-carrier or other effects by allowing design rules on degradation to be included in the netlist. Once the hot-carrier circuit simulation is launched, the rules are checked and the reliability design rule violations are reported. The process can be performed on either the layout or schematic window. The design rule criteria can be any device parameter and can be expressed in absolute or relative terms. The criteria can be based on device type, model card name, instance geometry, or temperature. Additionally, values can be set prior to beginning the simulation.
申请公布号 US7219045(B1) 申请公布日期 2007.05.15
申请号 US20010969186 申请日期 2001.09.27
申请人 CADENCE DESIGN SYSTEMS, INC. 发明人 WU LIFENG;CHOI JEONG Y.;CHEN ALVIN I.;FANG JINGKUN
分类号 G06F17/50;G06F9/45 主分类号 G06F17/50
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