发明名称 Word line driver with reduced leakage current
摘要 A circuit system having a first inverter, a second inverter and a blockage module is disclosed. The first inverter is coupled between a supply voltage and a complementary input signal, for generating a first output signal on an output terminal thereof in response to an input signal received by an input terminal of the same. The blockage module is coupled to the output terminal of the first inverter for selectively passing the first output signal there across in response to the input signal and the complementary input signal. The second inverter is coupled between the supply voltage and a complementary supply voltage, having a first input terminal directly coupled to the output terminal of the first inverter and a second input terminal coupled to the same via the blockage module for generating a second output signal in response to the first output signal.
申请公布号 US7218153(B2) 申请公布日期 2007.05.15
申请号 US20050208575 申请日期 2005.08.22
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 CHEN YEN-HUEI
分类号 H03K19/094;H03K19/21 主分类号 H03K19/094
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