发明名称 Forming very small semiconductor structures comprises first forming structure on prepared substrate by electron beam lithography, and subsequently forming second structure by optical lithography
摘要 <p>A layer to be structured (3) is formed on a prepared substrate (1, 2). Using electron beam lithography, a first structure (S1) comprising depressions (T), is formed in the layer. The first structure is embedded by filling the depressions with an auxiliary layer (6). Optical lithography is then carried out, to form a second structure in the layer. The auxiliary layer is removed. During substrate preparation, a gate dielectric layer (2) is formed on the surface of the substrate (1). When forming the layer to be structured, two layers are produced on the substrate. These comprise an underlying, electrically-conductive gate layer (3), especially polysilicon, with an insulating hard masking layer upon it. In the electron lithography stage, an electron beam resist is formed on the layer to be structured. This is illuminated (e) by an electron beam. The exposed resist is developed and structured. Using the structured resist , the first structure is etched as far as the substrate. The electron beam resist used, is a positively chemically-reinforced resist. The auxiliary layer is an i-line resist applied over the entire surface. This is etched back using a dry etching process. Alternatively, the auxiliary layer is applied as a spin-on-glass. It is planarized using chemical-mechanical polishing (CMP), or is back-etched. During optical lithography, the photo-resist is applied to the structured layer and illuminated optically (L). The exposed layer is developed and structured. The structured optical resist is then used to etch the second structure as far as the substrate. The i-line resist is not affected during optical lithography development. During the optical lithography stage, the resist is structured using a nano-imprint method, especially hot-embossing or step-and-flash lithography, before forming the second structure by etching, as before. The second structure has a first structure embedded by the auxiliary layer. Etching as far as the substrate, is carried out selectively, to the auxiliary layer. In the final stage, selective etching of the auxiliary layer is carried out selectively to the layer to be structured, and to the substrate.</p>
申请公布号 DE102005051972(A1) 申请公布日期 2007.05.10
申请号 DE20051051972 申请日期 2005.10.31
申请人 INFINEON TECHNOLOGIES AG 发明人 CHUNG, WOONG-JAE;SCHNEIDER, JENS;CHOI, KANG-HOON;KRETZ, JOHANNES;THRUM, FRANK
分类号 G03F7/00;G03F7/20;H01L21/336 主分类号 G03F7/00
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