| 摘要 |
A system and method for inhibiting radiation hardness of Silicon on Insulator (SOI) integrated circuits is described. An electrical connection is used to connect a substrate below a buried oxide layer to the topside above the buried oxide layer. A bias is then applied to the substrate. The bias may turn on a parasitic backgate in the buried oxide layer. As a result, the integrated circuit may not meet certain hardness criteria and, thus, not be subject to certain export restrictions imposed by the International Traffic in Arms Regulations.
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