发明名称 MEMORY MATRIX COMPOSED OF MEMORY CELLS EACH CONSTITUTED BY A TRANSISTOR AND A MEMORY ELEMENT CONNECTED IN PARALLEL
摘要 A memory matrix (10) in an electronic circuit comprises rows and columns of cells (100), each cell comprising an access control transistor (106) and a memory circuit element (104). Each column comprises a series arrangement (102) of main current channels of a plurality of the access control transistors (106). The memory element (104) in each cell (100) is coupled in parallel to the main current channel of the access control transistor (106) of the cell (100). Word lines (14) are coupled to control electrodes of the access control transistors (106) in cells (100). During readout an addressed one of access control transistors (106) of the series arrangement (102) is switched to a non-conductive state and the remaining ones of the access control transistors (102) of said series arrangement (102) are switched to a conductive state during access to the memory cells (100). A sensing circuit (16) coupled to the series arrangements (102) for measuring conductivity of the series arrangements (102), which is determined mainly by the conductivity of the memory element (104) of the selected cell.
申请公布号 WO2007052207(A1) 申请公布日期 2007.05.10
申请号 WO2006IB54000 申请日期 2006.10.30
申请人 KONINKLIJKE PHILIPS ELECTRONICS N.V.;VAN ACHT, VICTOR, M., G.;LAMBERT, NICOLAAS;WOERLEE, PIERRE, H.;MIJIRITSKII, ANDREI 发明人 VAN ACHT, VICTOR, M., G.;LAMBERT, NICOLAAS;WOERLEE, PIERRE, H.;MIJIRITSKII, ANDREI
分类号 G11C16/02;G11C11/15;G11C11/16;G11C13/02 主分类号 G11C16/02
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